1. Area of the Invention
This invention relates to power supply circuitry and in particular to low voltage dropout circuits.
2. Description of the Prior Art
Low voltage dropout circuits are commonly used in power supply systems to provide a regulated voltage at a predetermined multiple of a reference voltage. FIG. 1 shows a block diagram of a typical prior art low dropout voltage circuit. The circuit 10 includes an input port 12 and an output port 14, a field effect transistor 16, which is the path element, controlled by an amplifier 18. A first noninverting input to the amplifier 18 is a voltage reference 20 and the other inverting input is coupled to a node within a voltage divider 22 coupling the output port 14 to ground. Based upon the difference between a feedback voltage developed at a node 21 within the voltage divider 22 and the voltage reference 20, the amplifier 18 controls the gate voltage. The circuit 10 provides output voltage regulation independent of the output load current and the input voltage. Ignoring the voltage drop across the path element, the FET 16, the circuit 10 forces the output port voltage to be a predetermined multiple of the voltage reference 20.
To maximize the DC performance and to provide for efficient power systems, a desirable voltage regulator will have as small a drop out voltage as possible, where the dropout voltage is the voltage drop across the path element, FET 16. To achieve this low dropout voltage, it is desirable to maximize the die area of the FET transistor 16, and also to maximize the channel width to the channel length ratio of the FET 16. However, such large FET transistors have a large parasitic capacitance between the gate and the source and the drain. That parasitic capacitance will limit the upper frequency of the voltage regulator for stable operation and will permit some ripple with high frequency switching power supplies.
Another design criteria for low voltage dropout regulators is the effect of the load capacitance. In theory, the voltage regulator such as circuit 10 must be capable of driving an infinite capacitive load. Therefore, frequency compensation is necessary to keep the circuit from oscillating. To avoid such oscillations, the frequency compensation is normally done with a combination of internal and external capacitive elements. To accommodate infinite external load capacitance, the external compensation capacitor's capacitance is usually set above a minimum value. In addition, an internal compensation capacitance C.sub.c normally couples the output port 14 to the gate of the FET 16. However, due to the Miller effect from the FET 16, this capacitance and the capacitance of the FET is effectively multiplied. To maintain stability of the circuit, a dominant pole at a relatively low frequency of about less than 10 KHz is needed. To attain that large pole, the external compensation capacitance must be made extremely large.
However, using such large external capacitance generally creates additional problems. Such large capacitors are relatively expensive and occupy a large area on a circuit board.
It might be that AC analysis of the prior art embodiment 10 would show several other drawbacks. It is conceivable that the internal compensation capacitor C.sub.c provides a noninverting feed forward to the output port. Such a feed forward path might degrade stability if the external capacitive load exceeds the compensation capacitor.
Also, depending upon whether p-channel or n-channel transistors are used, either negative or positive power supply ripple may be injected into the system as a result of such feed forward non-inverting capacitance. In particular, the internal compensation capacitor C.sub.c provides a zero to either the negative or positive power supply ripple at about the lower pole of the circuit. Such ripple at the output of a voltage regulator injects noise into other circuits and should be reduced as much as possible.
Therefore, it is a first object of the invention to provide a dropout voltage regulator having a low dropout voltage and high efficiency. It is a second object of the invention to provide such a low dropout voltage regulator circuit having small external capacitance to reduce cost and the size of the entire circuitry. It is yet another object of the invention to provide a voltage regulator with good frequency stability and good high frequency power supply rejection ratio. It is still yet another object of this invention to eliminate the effects of non-inverting feed forward coupling by the compensation capacitor C.sub.c. It is still yet an additional object of the invention to eliminate the zero provided by the internal compensation capacitor C.sub.c.